RISC-V

RISCOF: RISC-V Compatibility Testing Framework

A framework to filter, configure, run and validate architectural tests on a given RISC-V implementation based on the configuration.

RISCV-CONFIG: RISC-V Configuration Validator

A python based validator to validate the configuration of a RISC-V implementation using a yaml based format. The specification format is scalable to handle all possible architectural options as allowed by the RISC-V specification, including WARL functions of CSRs.

RISCV-CTG: RISC-V Coverage Driven Test Generator

Due to the highly permissive nature of the RISC-V ISA, manually writing high quality architectural compatibility tests is infeasible. This tool models tests as a set of constraint satisfcation problems(CSP) in finite domain using the architectural fields as variables and coverage goals as constraints. The solutions to these problems are found using CSP solvers and converted into RISC-V assembly programs using handwritten templates.

RISCV-ISAC: RISC-V ISA Coverage Generator

Defines an open source coverage specification format using only the fields in the ISA. Thereby, providing a free, independent and scalable coverage measurement tool for Architectural Compatibility Testing. It also analyses the instruction trace to provide data propagation reports which are critical for memory signature based tests. The data propagation reports ensure that bugs in the implementation manifest as mismatched signature when compared with the golden model.